Wei-Tsung Sun, Yunn-Yen Chen, Jih-Kwon Peir and Chung-TA King
Department of Computer Science
National Tsing Hua University
Hsinchu, Taiwan 30043, R.O.C
The conventional private translation lookaside buffer (TLB) design in a multiprocessor system may create the TLB consistency problem. One way to avoid the problem is to use shared TLBs. In this paper, we will discuss a design for shared TLBs for shared-memory multiprocessors. The performance of the proposed shared TLB design is evaluated using the trace-driven technique. The traces are collected from general-purpose applications [1,8]. Results from the simulation show that the shared TLB approach, in general, has a lower TLB miss ratio than does the private TLB solution. For example, using a 4-way set-associative TLB and keeping the total size of TLBs fixed, the miss ratios using shared TLBs of size 64¡Ñn pages, where n is the number of processors in the system, are 4%, 14%, and 37% lower than the miss ratios using private TLBs in a 2-,4-, and 8- processor system, respectively. The results also indicate that the shared TLB design can achieve roughly the same miss ratio by using about half the total size of private TLBs.
Keywords: address translation, interconnection network, translation lookaside buffer, virtual memory system, multiprocessor system
Received October 31, 1992; revised March 9, 1993.
Communicated by Shing-Tsaan Huang.
*This work was supported by the national science Council of R.O.C. under Grants NSC81-0408-E007-581 and NSC81-0408-E007-18.