Hiroto Yasuura, Hiroyuki Tomiyama, Akihiko Inoue and
Eko Fajar N.
Department of Computer Science and Communication Engineering
Graduate School of Information Science and Electrical Engineering
Kyushu University, Fukuoka 816-8580, JAPAN
A new design methodology of embedded systems based on a user defined application specific processor, called a soft-core processor, and a new programming language, Valen-C, is proposed. In the initial design phase, a designer designs a system with a soft-core processor, RAM, ROM and logic circuits. Software on the system is written in Valen-C, in which the designer can specify the word length of each variable required for accurate computation in the program. After verifying the functionality of the initial design, we can optimize the system by changing several parameters of the soft-core processor. The total area of a system including the soft-core processor, ROM and RAM can be optimized by changing the word length. The proposed design method enables the designer to tune up the processor architecture for his application easily.
Keywords: embedded systems, core processors, retargetable compiler, datapath width, RAM, ROM, system optimization
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Received October 31, 1997; revised March 18, 1998.
Communicated by Jin-Yang Jou.