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Journal of Information Science and Engineering, Vol.18 No.4, pp.507-518 (July 2002)

Bit-serial AB2 Multiplier Using Modified Inner Product*

Jun-Cheol Jeon, Hyun-Sung Kim+, Hyung-Mok Lee
and Kee-Young Yoo

Department of Computer Engineering
Kyungpook University
Daegu, Korea
+Department of Computer Engineering
Kyungil University
Kyungsansi, Kyungsangpookdo, Korea

This paper presents a new multiplication algorithm and, based on this algorithm, proposes a hardware architecture, called Modified Inner-Product Multiplier (MIPM), which computes AB2 multiplication based on a Linear Feedback Shift Register (LFSR). The algorithm is based on the property of the irreducible all one polynomial (AOP) over the finite field GF(2m). The proposed architecture reduces the time and space complexity for computing AB2. The proposed architecture has a potential application to implementing exponentiation architecture for a public-key cryptosystem.

Keywords: cryptosystem, linear feedback shift register architecture, standard basis, inner product, irreducible all one polynomial

Full Text () Retrieve PDF document (200207_03.pdf)

Received September 14, 2001; accepted April 15, 2002.
Communicated by Jang-Ping Sheu, Myongsoon Park and Makoto Takizawa.
*This work was supported by Grant No. 2000-2-51200-001-2 from the Basic Reserach Program of the Korea Science and Engineering Foundation.