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Journal of Information Science and Engineering, Vol.18 No.5, pp.745-762 (September 2002)

Performance Analysis of General Cut-Through Switching
on Buffered MIN Switches*

Chan L. Liao and Woei Lin
Institute of Computer Science
National Chung Hsing University
Taichung, 402 Taiwan

This paper presents a general analytical model for studying the effect of cut-through switching on buffered MIN (multistage interconnection network) switches. We consider two types of MIN switches: input-buffered MIN and output-buffered MIN. Previous studies of cut-through switching assumed the use of 2X2 switching elements as a building block for the MIN; and they are not applicable to MINs using switches of other sizes than 2X2. With the general model, we find that switch size actually plays a key role in determining the performance of cut-through switching on the buffered min switch. Our proposed model and analysis successfully exhibit these performance characteristics, many of which were unknown previously, in terms of normalized throughput and delay under various operating conditions. The proposed model allows us to quantitatively analyze the joint effect of major system parameters, switch size and others, on the performance of cut-through switching for the two types of MINs. Our analysis essentially shows that cut-through switching has different effects on the performance of the input-buffered MIN switch and the output-buffered MIN switch. The differences are indicated and elaborated. In addition, through simulation we study the performance of cut-through switching on the buffered MIN switch under bursty traffic and hot-spot traffic.

Keywords: high-speed switching, input/output buffers, cut-through switching, performance analysis, interconnection networks

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Received September 20, 2001; accepted April 15, 2002.
Communicated by Jang-Ping Sheu, Makoto Takizawa and Myongsoon Park.
*This research is supported in part by National Science Council, Taiwan, R.O.C., NSC-88-2213-E-020.