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Po-Chang Tsai, Sying-Jyan Wang, Ching-Hung Lin and Tung-Hua Yeh
Department of Computer Science
National Chung-Hsing University
Taichung, 402 Taiwan
In this paper, we proposed a test data compression scheme targeted for minimizing
the amount of test data. The proposed scheme can reduce the test application time and
minimize the amount of compressed test data, which reduces the size of data memory in
ATE and the time needed to transfer test data. A decoder design is also presented. Experimental
results on ISCAS benchmark circuits show that the compressed data produced
by our method are much smaller than previous methods.
Received September 30, 2005; revised December 23, 2005 & February 22, 2006; accepted March 16, 2006.
Communicated by Liang-Gee Chen.