Keywords: register file, leakage energy, register-usage exploiting, register assignment, dynamic voltage scaling
Received November 28, 2006; revised March 14 & May 23 & August 6, 2007; accepted September 5, 2007.
Communicated by Tei-Wei Kuo.
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Wann-Yun Shieh and Chien-Chen Chen
Department of Computer Science and Information Engineering
Chang Gung University
Taoyuan, 333 Taiwan
Applying dynamic voltage scaling technique to design a low-power register file plays an important role in modern embedded-processor design. In this paper, we propose a compiler-aided approach to find out in a program which and when the registers would not be used, and to turn these unused registers into low power mode through voltage- scaling controls. The proposed approach can be partitioned into the software mechanism and the hardware logic. For the software mechanism, we exploit register-usage and schedule voltage-scaling controls at selected points in a program. For the hardware logic, we propose a ¡§connected¡¨ recorder to store power states for multiple registers such that sequential voltage-scaling controls can be performed in a batch, instead of one power- state update just for only one register. Simulation results show that the proposed approach not only improves total register file energy consumption by 21%- 28% through leakage energy saving, but also provides well trade-offs in the term of energy-delay product.
Received November 28, 2006; revised March 14 & May 23 & August 6, 2007; accepted September 5, 2007.
Communicated by Tei-Wei Kuo.