Keywords: system-on-chip, LPC-cepstrum, HMM, ASIC, dual-ALU, speech recognition
Received May 27, 2008, revised May 27 & July 14, 2009; accepted August 5, 2009.
Communicated by Chung-Ping Chung.
| Previous | [ 1] | [ 2] | [ 3] | [ 4] | [ 5] | [ 6] | [ 7] | [ 8] | [ 9] | [ 10] | [ 11] | [ 12] | [ 13] | [ 14] | [ 15] | [ 16] | [ 17] | [ 18] | [ 19] | [ 20] | [ 21] | [ 22] | [ 23] | [ 24] | [ 25] |
¡@
GIN-DER WU AND KUEI-TING KUO
Department of Electrical Engineering
National Chi Nan University
Puli, 545 Taiwan
This paper proposed a system-on-chip (SOC) architecture for speech recognition
which is speaker dependent. The feature extraction bases on LPC (linear predictive coefficient)-
cepstrum coefficients, and template matching employs Hidden Markov Models
(HMM). It does not aim to offer a sophisticated solution but rather a high speed solution.
This SOC architecture includes an ASIC of LPC-cepstrum and a Dual-ALU processor.
The proposed ASIC of LPC-cepstrum can reduce the calculation load of processor in the
speech recognition system. To reduce the area of this ASIC, the resource sharing method
is adopted into our design. In addition, this paper also proposed the Dual-ALU processor
which provides parallel calculation capability. Hence, it can run more complicated algorithm
of speech recognition. For the consideration of chip size, the area of the second
ALU is only half of the first ALU. From the experiments, the speech recognition system
can provide a high speed solution.
Received May 27, 2008, revised May 27 & July 14, 2009; accepted August 5, 2009.
Communicated by Chung-Ping Chung.