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Journal of Information Science and Engineering, Vol. 26 No. 4, pp. 1289-1305 (July 2010)

Hardware Context-Switch Methodology for Dynamically Partially Reconfigurable Systems*

TRONG-YEN LEE, CHE-CHENG HU, LI-WEN LAI AND CHIA-CHUN TSAI+
Department of Electronic Engineering and Institute of Computer and Communication Engineering
National Taipei University of Technology
Taipei, 106 Taiwan
E-mail: tylee@ntut.edu.tw
+Department of Computer Science and Information Engineering
Nanhua University
Chiayi, 622 Taiwan
E-mail: chun@mail.mhu.edu.tw

Nowadays, the hardware of field programmable gate arrays (FPGAs) can be reconfigured both dynamically and partially. A dynamically and partially reconfigurable system can share hardware contexts among various hardware tasks. However, such FPGA systems require much memory to save the hardware context. To solve this problem, this work proposes a methodology for switching hardware context in dynamically partially reconfigurable FPGA systems. This method can reduce the reconfiguration time and memory size of hardware context-switching by analyzing the characteristic of bit indexes and frame addresses. The experimental results show that the proposed method reduces 10.674% in hardware reconfiguration time, 47.47% in memory size, and 41.25% in resource overhead.

Keywords: context-switching, dynamically partially reconfigurable system, Readback, reconfiguration time, memory size, resource overhead

Full Text () Retrieve PDF document (201007_09.pdf)

Received June 2, 2008; revised March 16 & June 1, 2009; accepted July 17, 2009.
Communicated by Chung-Ping Chung.
* This paper was partially supported by the National Science Council of Taiwan, R.O.C., under Grants No. NSC 98-2221-E-027-071.