Previous [ 1] [ 2] [ 3] [ 4] [ 5] [ 6] [ 7] [ 8] [ 9] [ 10] [ 11] [ 12] [ 13] [ 14] [ 15] [ 16] [ 17] [ 18] [ 19] [ 20] [ 21]

@

Journal of Information Science and Engineering, Vol. 30 No. 3, pp. 765-786 (May 2014)


Energy-Efficient Real-Time Scheduling of Tasks With Abortable Critical Sections*


JUN WU+ AND KAI-LONG KE
Department of Computer Science and Information Engineering
National Pingtung Institute of Commerce
Pingtung, 900 Taiwan
E-mail: junwu@npic.edu.tw; leon.kidd@gmail.com

In this paper, an energy-efficient scheduling algorithm, called ceiling-based conditional abortable scheduling (CB-CAS) algorithm, is proposed to schedule periodic hard real-time tasks in a non-ideal DVS processor. Based on the schedulability analysis, CBCAS calculates a proper processor speed for task execution so that the energy consumption can be reduced without violating the timing constraints of tasks. For saving more energy, we also assume that the critical sections of tasks are abortable, which is a strategy originally proposed to reduce priority inversions. In this paper, CB-CAS introduces a conditional abort rule and a dynamic speed adjustment method to work with the rate monotonic scheduling algorithm and the priority ceiling protocol so that the energy consumption could be reduced further. Whenever two tasks are conflicting for the same resource, CB-CAS will examine the cost of blocking the higher-priority task and the cost of aborting the lower-priority task. CB-CAS will abort the lower-priority task and adjust the processor speed dynamically only if it is more energy efficient. The schedulability analysis and the properties of CB-CAS are given in this paper. The capabilities of CB-CAS were also evaluated by a series of experiments, for which we have some encouraging results.

Keywords: real-time systems, dynamic voltage scaling, energy-efficient scheduling, task scheduling, task synchronization, abortable critical sections

Full Text () Retrieve PDF document (201405_14.pdf)

Received October 21, 2013; revised December 13, 2013; accepted February 4, 2014.
Communicated by Cho-Li Wang. * The preliminary version of this work has been presented at the 3rd International Symposium on Advances in Embedded Systems and Applications, 25-27 June, 2012, Liverpool, UK. * This work was supported in part by the National Science Council of Taiwan, under Grants NSC-101-2221-E- 251-005 and NSC-102-2221-E-251-004. + Corresponding author.