特聘研究員  |  游本中       Personnel Training   Ph.D. Ph.D., Tong Chen, "Memory Profiling and Management", Department of Computer Science and Engineering, University of Minnesota at Twin-Cities (2011/04) Ph.D., Venakatesan Packirisamy, "Architectural Support for Thread-Level Speculation", Department of Computer Science and Engineering, University of Minnesota at Twin-Cities (2009/05) Ph.D., Jinpyo Kim, "COBRA: A Framework for Profiling and Binary Re-Adaptation", Department of Computer Science and Engineering, University of Minnesota at Twin-Cities (2008/01) Ph.D., Shengyue Wang, "Compiler Techniques for Thread-Level Speculation", Department of Computer Science and Engineering, University of Minnesota at Twin-Cities (2007/02) Ph.D., Xiaoru Dai, "A General Compiler Framework for Speculative Optimizations Using Data Speculative Code Motion", Department of Computer Science and Engineering, University of Minnesota at Twin-Cities (2005/06) Ph.D., Sangyuen Cho, "A High-Bandwidth Memory Pipeline for Wide-Issue Processors", Department of Computer Science and Engineering, University of Minnesota at Twin-Cities (2002/12) Ph.D., Bixia Zheng, "Integrating Scalar Analyses and Optimizations in a Parallelizing and Optimizing Compiler", Dept of Computer Science and Engineering, University of Minnesota at Twin-Cities (2000/02) Ph.D., Jinseok Kong, "Binding Time in Distributed Shared Memories", Dept of Computer Science and Engineering, University of Minnesota at Twin-Cities (1999/06) Ph.D., Hock Beng Lim, "On the Integration of Compiler-Directed Cache Coherence and Data Prefetching", Dept of Computer Science, University of Illinois at Urbana-Champaign (1999/01) Ph.D., Jenn-Yuan Tsai, "Superthreading: Integrating Compilation Technology and Processor Architecture for Cost-Effective Concurrent Multithreading", Dept of Computer Science, University of Illinois at Urbana-Champaign (1998/04) Ph.D., Lynn Choi, "Hardware and Compiler Support for Cache Coherence in Large-Scale Shared-Memory Multiprocessors", Dept of Computer Science, University of Illinois at Urbana-Champaign (1996/04) Ph.D., Pavlos Konas, "Parallel Architectural Simulations on Shared-Memory Multiprocessors", Dept. of Computer Sciecne, University of Illinois at Urbana-Champaign (1994/08) Ph.D., David K. Poulsen, "Memory Latency Reduction via Data Prefetching and Data Forwarding in Shared-Memory Multiprocessors", Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign (1994/08) Ph.D., Ding-Kai Chen, "Compiler Optimization for Parallel Loops with Fine-Grained Synchronization", Dept. of Computer Sciecne, University of Illinois at Urbana-Champaign (1994/05) Ph.D., William Hsu, "Multiprocessor Communication: Design and Technology", Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign (1992/08) Ph.D., Hong-Men Su, "On Multiprocessor Synchronization and Data Transfer", Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign (1992/01) Ph.D., David John Lilja, "Processor Parallelism Considerations and Memory Latency Reduction in Shared Memory Multiprocessors", Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign (1991/09) Ph.D., Timothy Alden Davis, "A Parallel Algorithm for Sparse Unsymmetric LU Factorization", Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign (1989/09) Ph.D., Zhiyuan Li, "Intraprocedural and Interprocedural Data Dependence Analysis for Parallel Computing", Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign (1989/08) Ph.D., Peiyi Tang, "Self-Scheduling, Data Synchronization and Program Transformation for Multiprocessor Systems", Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign (1989/01) Ph.D., Roland Lee, "The Effectiveness of Caches and Data Prefetch Buffers in Large-Scale Shared Memory Multiprocessors", Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign (1987/07) Ph.D., N.F. Tzeng, "Fault-Tolerant Multiprocessor Interconnection Networks and Their Fault-Diagnoses", University of Illinois at Urbana-Champaign (1986/08) M.S. M.S., Jun Liang, Dept. of Computer Science and Engineering, University of Minnesota (2003/03) M.S., Yan Zheng, "High-Level Information - Design and Implementation of a Framework for Integrating Front-End and Back-End Compilers", Dept. of Computer Science and Engineering, University of Minnesota (2000/12) M.S., Yuan Wang, Dept. of Computer Science and Engineering, University of Minnesota (2000/06) M.S., Xiang-Yin Chen, Dept. of Computer Science and Engineering, University of Minnesota (2000/05) M.S., Yubin Cui, Dept. of Computer Science and Engineering, University of Minnesota (1999/11) M.S., Davis Pynadath Jose, Dept. of Computer Science and Engineering, University of Minnesota (1999/06) M.S., Zhenzhen Jiang, "Simulation Study of a Concurrent Multithreaded Processor", Dept. of Computer Science and Engineering, University of Minnesota (1997/04) M.S., Wei-Chau Chang, "An Empirical Study on Branch Bypassing", Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign (1991/08) M.S., Hock-Beng Lim, "Characterization of Parallel Program Behavior on a Shared-Memory Multiprocessor", Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign (1989/10) M.S., Ding-Kai Chen, "MaxPar: An Execution Driven Simulator for Studying Parallel Systems", Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign (1989/10) M.S., David M. Marcovitz, "A Multiprocessor Cache Performance Metric", Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign (1988/08) M.S., D.T. Jackson, "Data Movement in Doall Loops", University of Illinois at Urbana-Champaign (1985/08) M.S., Pavlos Konas, "Parallel Discrete Event Simulation on Shared Memory Multiprocessors", Center for Supercomputing Research and Development