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Digital Logic Design Lab (¼Æ¦ìÅÞ¿è³]­p¹ê²ß), Spring 2010


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Lecturing Information
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Announcement (¤½§i)
 
Note Date Content
 NEW 2010/06/21 ¥|¤l¤@¤A´Á¥½¦¨ÁZ¤w¤W¶Ç¡A­Y¹ï¦¨ÁZ¦³°ÝÃD¡A½Ð¦b6/27±ß¤W12ÂI¤§«e¼g«H§iª¾¡C [link]
 NEW 2010/06/21 ¥|¤l¤@¥Ò´Á¥½¦¨ÁZ¤w¤W¶Ç¡A­Y¹ï¦¨ÁZ¦³°ÝÃD¡A½Ð¦b6/25¤U¤È7ÂI¤§«e¼g«H©Î«e¨Ó207-2¡C [link]
  2010/06/14 Slides for Lab 14 are uploaded. [link]
  2010/05/28 Slides for Lab 13 are uploaded. [link]
  2010/05/21 Slides for Lab 12 are uploaded. [link]
  2010/05/14 Slides for Lab 11 are uploaded. [link]
  2010/05/07 Slides for Lab 10 are uploaded. [link]
  2010/04/30 Slides for Lab 9 are uploaded. [link]
  2010/04/23 ¥|¤l¤@¤A¤µ¤Ñ¹êªº½Ò­Y¤w¸g°µ§¹«e­±©Ò¦³¹êÅ窺¦P¾Ç¡A´N¤£¦P¨Ó¤W½Ò¤F¡C
  2010/04/16 Slides for Lab 8 are uploaded. [link]
  2010/04/10 ¥|¤l¤@¤A Report 6 ¦³³\¦h¦P¾Çªº³ø§i¤º®e»á¦³¬Û¦ü¤§³B¡A¤×¨ä¦³¨Ç¦P¾Çµ{¦¡¤º®e¤@¼Ò¤@¼Ë(³sªÅ¥Õ³£¤@¼Ë)¡A½Ð¦P¾Ç¤@©w­n³]ªk¤F¸Ñ¡A¤£À´ªº¥i¥H¨Ó°Ý¦Ñ®v¡A©Î¬O½Ò¥»ùØÀY³£¦³¡A§_«h¨S¦³¾Ç¨ì¬O¦Û¤vªº·l¥¢¡A¥B´Á¤¤´Á¥½¤W¾÷¦Ò¸Õ¤]¥i¯à¦Ò¤£¹L¡C
  2010/04/09 Slides for Lab 7 are uploaded. [link]
  2010/04/04 ¹êÅç¤ß±oú¥æªpª¬¤@Äýªí¤w¤½§i©ó½Òµ{ºô­¶ªºGrading¡C¦P¾Ç­Y¦³§@·~ú¥æ©Î¦¨ÁZ¤Wªº°ÝÃD¡A½Ð¥ß§Y»P¦Ñ®vÁpµ¸¡C [link]
  2010/04/02 Slides for Lab 6 are uploaded. [link]
  2010/03/26 Slides for Lab 5 are uploaded. [link]
  2010/03/19 Slides for Lab 4 are uploaded. [link]
  2010/03/12 Slides for Lab 3 are uploaded. [link]
  2010/03/05 Slides for Lab 1 and Lab 2 are uploaded. [link]
  2010/03/01 New slides "°ò¦¹êÅç³]³Æ»{ÃÑ - ¤¸¥ó»P»ö¾¹¤¶²Ð" has been uploaded.

Digital Design with CPLD Applications and VHDL, 2/e, by Robert Dueck, Thomson
     


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Yuan-Hao Chang
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