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Digital Logic Design Lab (數位邏輯設計實習), Spring 2011


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Lecturing Information
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Announcement (公告)
 
Note Date Content
 NEW 2011/06/17 四子一乙期末成績已公佈,成績將在6/24晚上上傳,上傳之後將不再接受成績修改 [Go to Grading]。
 NEW 2011/06/16 四子一甲期末成績已公佈,成績將在6/24晚上上傳,上傳之後將不再接受成績修改 [Go to Grading]。
 NEW 2011/06/16 四子一甲與四子一乙最後一次作業的繳交期限為6/24日。若欲補繳最後一次作業者,請於6/24日下午2點~5點之間到綜科502室,若補交人數較少,則改至老師辦公室207-2室。期末成績將在6/24晚上上傳,上傳之後將不再接受成績修改。
 NEW 2011/06/09 四子一甲期末考於6/16下午4:10~6:30,於綜科502室舉行。四子一乙期末考於6/17下午2:10~4:30 於綜科502室舉行。
  2011/06/09 The slides of "14. Microprocessors" have been uploaded [Go to Slides].
  2011/06/03 因專題競賽之緣故,6/3停課一次。
  2011/06/01 The slides of "13. Memory" have been uploaded [Go to Slides].
  2011/05/26 The slides of "12. State Machine" have been uploaded [Go to Slides].
  2011/05/18 The slides of "11. Shift Registers" have been uploaded [Go to Slides].
  2011/05/12 The slides of "10. Sequential Logic - Flip Flop" have been uploaded [Go to Slides].
  2011/05/05 The slides of "9. Sequential Logic - Latch" have been uploaded [Go to Slides].
  2011/04/28 The slides of "8. MUX / DMUX and Full Adder" have been uploaded [Go to Slides].
  2011/04/21 The slides of "7. Combinational Logic Functions" have been uploaded [Go to Slides].
  2011/04/14 The slides of "6. VHDL Introduction" have been uploaded [Go to Slides].
  2011/03/31 The classes on April 7 and April 8 are cancelled due to the tomb-sweeping festival.
  2011/03/31 The slides of "5. DE0 with QuartusII" have been uploaded [Go to Slides].
  2011/03/23 The slides of "4. Combinational Logic" have been uploaded [Go to Slides].
  2011/03/17 The slides of "3. Logic Gates" have been uploaded [Go to Slides].
  2011/03/10 The slides of "2. Introduction to Digital IC" have been uploaded [Go to Slides].
  2011/02/21 The slides of "1. Introduction to Components and Equipments" have been uploaded [Go to Slides].

Digital Design with CPLD Applications and VHDL, 2/e, by Robert Dueck, Thomson
     


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Yuan-Hao Chang
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