Institute of Information Science, Academia Sinica

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Reaping Performance and Reliability Benefits via Exploiting Adverse Effects of NAND Flash Memory

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Reaping Performance and Reliability Benefits via Exploiting Adverse Effects of NAND Flash Memory

  • LecturerProf. Chien-Chung Ho (Department of Information Engineering, National Chung Cheng University)
    Host: Yuan-Hao Chang
  • Time2020-09-11 (Fri.) 10:30 ~ 12:30
  • LocationAuditorium106 at IIS new Building
Abstract

To store the desired data on MLC and TLC flash memories, the conventional programming strategies need to divide a fixed range of threshold voltage (Vt) window into several parts. The narrowly partitioned Vt window in turn limits the design of programming strategy and becomes the main reason to cause flash-memory defects, i.e., the longer read/write latency and worse data reliability. This talk will address how to explore the innovative programming design for solving the flash-memory defects.  Besides, as data security has become the major concern in modern storage systems with low-cost MLC and TLC flash memories, it is not trivial to realize data sanitization in such a system. Even though some existing works employ the encryption or the built-in erase to achieve this requirement, they still suffer the risk of being deciphered or the issue of performance degradation. As a result, this talk will also address how to exploit the inherent defeats of MLC and TLC flash memories on the implementation of data sanitization for SSDs.