中央研究院 資訊科學研究所

Memory is a fundamental resource for computation, and a typical computing system will have innumerable caches in its memory hierarchy. In a multiprogramming context (with multicores or virtual machines), cache allocation must be frugal for a shared resource, yet generous to minimize the heavy latency penalty of a cache miss.

Workloads are ever-changing, so cache sizing must be autonomic. Cache miss equations can help, but they must be universal: they must fit any real memory reference pattern and cache management policy, through parameters that can be calibrated automatically and dynamically. This talk describes such an equation.  Its universality is demonstrated with applications to main memory, database buffer, L2 cache, garbage-collected heap, transcendent memory and router cache.

Y.C. Tay received his B.Sc. degree from the University of Singapore and Ph.D. degree from Harvard University. He is a professor in the Departments of Mathematics and Computer Science at the National University of Singapore (http://www.comp.nus.edu.sg/~tayyc ). His main research interest is performance modeling (database transactions, wireless protocols, Internet traffic, memory allocation); other interests include distributed protocols and database systems. He is author of "Analytical Performance Modeling for Computer Systems".